The term “Silicon on Insulator” (SOI) refers to the use of a layered silicon-insulator-silicon substrate instead of standard silicon substrate in semiconductor industry. SOI structure reduces parasitic capacitance, resists latch up and thereby improves device performance.
Methods for producing SOI wafers are known in the art. A first example of a method for producing SOI wafers is, Separation by Implantation of Oxygen (SIMOX), in which a buried silicon oxide layer is created by implanting oxygen ions under the surface of the substrate and annealing the substrate in high temperature. A second example of a method for producing SOI wafers is, directly bonding an oxidized face of first silicon wafer to a second wafer (i.e., wafer bonding method), followed by the release of the first silicon wafer. A third example of a method for producing SOI wafers is, growing a silicon crystal directly on an overgrown oxide (i.e., the seed method) by digging a pit in the oxide until reaching the underlying crystal. Then, the deposition of epitaxial silicon will firstly fill the pit vertically, continuing then-after with lateral overgrowth onto the oxide. All the methods detailed in the above examples are costly, and enable the production of a single active layer on top of the oxide (i.e., insulator).
Reference is now made to U.S. Pat. No. 5,061,642 to Fujioka, entitled “Method of Manufacturing Semiconductor on Insulator”, which is directed to a method for forming SOI structure by Separation by Implanted Oxygen (SIMOX). The SIMOX method includes the procedures of oxygen ions are implanted to the surface of a silicon substrate, and the substrate is subjected to heat cycle annealing. As a result of the annealing, a Si single crystal layer is formed in the top region of the surface of the substrate and an SiO2 layer is formed just underneath the Si layer. The method further includes the procedures of implanting Boron ions in the substrate and forming source and drain electrodes by implanting arsenic ions in the substrate.
Reference is now made to U.S. Pat. No. 4,771,016 to Bajor et al., entitled “Using a Rapid Thermal Process for Manufacturing a Wafer Bonded SOI Semiconductor”, which is directed to a method for forming silicon on insulator semiconductor device using wafer bonding. The method includes the procedures of providing a first layer of semiconductor material formed on a first support structure, providing a second layer of an insulating material formed on a handle wafer, engaging the top surface of the first layer with the top surface of the second layer, and bonding the first support structure to the handle wafer.
The first layer of semiconductor device has an exposed top surface. The second layer of an insulating material has an exposed top surface. The bonding is achieved by annealing the first layer and the second layer using a rapid thermal process. The method further includes the procedure of removing the support structure from the first layer of semiconductor material.
Reference is now made to U.S. Pat. No. 5,417,180 to Nakamura, entitled “Method for Forming SOI Structure”, which is directed to a method for forming an SOI structure. The method includes the procedures of forming an insulating layer (i.e., by oxidizing a silicon layer) and providing the insulating layer with an opening down to the silicon surface. The method further includes the procedure of epitaxially growing a seed crystal within the opening until the depth of the seed crystal layer substantially reaches the depth of the opening. The method continues with the procedures of forming a growth blocking layer on a top surface of the seed crystal layer (i.e., by nitrifying the seed crystal layer), and laterally epitaxially growing the seed crystal layer on top of the insulating layer.